TSS Hardware Engineering Internship (Summer 2027)

About the role

This 10-week New York City internship focuses on FPGA-based hardware engineering for systematic trading systems. Interns design, simulate, verify, and implement digital logic, develop reusable RTL components, investigate performance issues, and collaborate across hardware, software, networking, and quantitative teams under experienced engineering mentorship.

Responsibilities

• Design, simulate, and test digital logic for FPGA-based systems with support from experienced engineers.
• Contribute reusable RTL components and verification environments.
• Write tests and debugging tools using SystemVerilog, Python, or similar languages.
• Use simulation and waveform-analysis tools to investigate functional and performance issues.
• Gain experience with synthesis, timing analysis, FPGA implementation, and hardware-software interfaces.
• Document work, present findings, and collaborate with hardware, software, networking, and quantitative teams.

Program Details

• The summer internship takes place at the Soho-based New York City office.
• Interns work on one project with an assigned mentor throughout the program.
• The project culminates in a final presentation.
• Interns may attend company events, guest-speaker sessions, and intern-specific social events.

Required Qualifications

• Currently pursuing a bachelor's or master's degree in electrical engineering, computer engineering, computer science, or a related technical field.
• Completed coursework or projects in digital logic, computer architecture, embedded systems, computer networking, or related areas.
• Familiarity with a hardware-description language such as SystemVerilog, Verilog, or VHDL.
• Basic programming experience in Python, C, C++, or a similar language.
• Understanding of combinational and sequential logic, finite-state machines, pipelining, and clocked circuits.
• Strong problem-solving, communication, and collaboration skills, with interest in FPGA development and low-latency systems.

Preferred Qualifications

• Experience with an FPGA development board or vendor toolchain.
• Familiarity with simulation, testbenches, assertions, or waveform debugging.
• Exposure to synthesis, timing constraints, clock-domain crossings, or hardware verification.
• Familiarity with Ethernet, TCP/IP, UDP, or other networking concepts and protocols.
• Participation in robotics, chip design, embedded systems, competitive programming, or engineering clubs.
• Experience with Git or another version-control system; interest in high-performance computing or financial technology.

Benefits and Compensation

• Flexible hybrid work policy with a budget for home-office setup.
• Perks include onsite gyms with laundry service, wellness activities, casual dress, snacks, and game rooms.
• Weekly base pay is $3,800 for bachelor's, $3,900 for master's, and $4,200 for PhD students.
• The role may also be eligible for other compensation and benefits.