FPGA Engineer Intern (Summer 2027 - Chicago)

About the role

As an FPGA Engineer Intern in Chicago during Summer 2027, you’ll build real-world, low-latency trading-system applications with Optiver engineers. You’ll design high-speed hardware, research networking techniques, and collaborate with traders, software developers, and infrastructure engineers while contributing to systems involving nanosecond response times and highly parallelized algorithms.

Responsibilities

• Accelerate network infrastructure and trading-system components using high-speed FPGA hardware designs.
• Research low-latency techniques and platforms for potential integration with trading systems.
• Collaborate with traders, software developers, and infrastructure engineers on multidisciplinary projects.
• Build or leverage hardware enabling FPGAs to interface with advanced server hardware.

Program Benefits

• Receive mentorship from Optiver engineers while working on real-world, team-driven projects.
• Receive a competitive internship compensation package and Optiver-covered flights, accommodation, and commuting stipends.
• Access office meals, snacks, social events, clubs, and sporting leagues.
• Work alongside professionals from more than 40 countries.

Requirements

• Pursue a bachelor’s, master’s, or PhD in computer engineering, electrical engineering, or a related field.
• Maintain junior standing or higher and expect graduation between December 2027 and June 2028.
• Have hands-on digital-design experience with FPGAs or ASICs.
• Write hardware using VHDL, Verilog, or SystemVerilog.
• Demonstrate strong engineering instincts, clean coding practices, and well-architected systems.
• Collaborate comfortably with developers, traders, and business teams.

Additional Information

• The role is based in Chicago and is also available in Optiver’s Austin office.
• Optiver supports United States immigration sponsorship for this role.
• Applicants cannot reapply within eight months of completing an assessment or interview for an eligible Optiver FPGA role.