Hardware Engineer (FPGA/ASIC)

About the role

This internship offers hands-on experience in hardware engineering using OCaml and Hardcaml for FPGA and ASIC design. Interns work on real projects with mentorship, gaining skills in hardware description languages and vendor tools.

Role and Responsibilities

• Work on hardware engineering projects using OCaml and Hardcaml for RTL design and testing.
• Build hardware applications from concept to working design targeting FPGA or ASIC platforms.
• Collaborate closely with full-time mentors on real-world projects.
• Engage in problem-solving and development of new hardware solutions.
• Gain exposure to internal libraries and tools foundational to Jane Street's systems.
• Participate in projects addressing both big-picture questions and new builds.

Requirements

• Comfortable with a software programming language.
• Experience with hardware description languages like VHDL, Verilog, Chisel, or Pymtl.
• Familiarity with FPGA or ASIC vendor tools such as Vivado, Quartus, Genus, or Innovus.
• Experience building working hardware projects through academic, professional, or personal work.
• Interest in learning FPGA or ASIC applications in networking contexts.
• No prior knowledge of Hardcaml or finance required.